The different functional elements in a computer pass information by means of one or more data buses. The prevalent type of bus used in personal computers is the 16-bit wide expansion bus known as the Industry Standard Architecture (ISA) bus. The ISA bus has been expanded into a 32-bit wide bus known as the Extended Industry Standard Architecture (EISA) bus. As used herein, any reference to EISA is meant to include ISA, and vice versa.
Graphic-oriented operating systems, such as Windows.TM. and OS/2.TM., have created data bottlenecks between the processor and display peripherals in personal computers relying solely upon ISA or EISA buses. These bottlenecks can be reduced by moving peripheral functions with high bandwidth requirements closer to a system's processor bus. A Peripheral Component Interconnect (PCI) local bus is used for this purpose. The PCI local bus has resulted in substantial performance gains in connection with graphical user interfaces (GUIs) and other high bandwidth functions.
FIG. 1 illustrates a general purpose computer 20 that incorporates both an ISA bus and a PCI bus. The computer 20 includes a Central Processing Unit (CPU) 22 that is connected to a CPU bus 28. A cache memory controller 24 controls a cache memory 26, which stores recent or frequently used data. The cache memory controller 24 is also connected to Dynamic Random Access Memory (DRAM) 30. The CPU bus 28 has a number of components connected to it. By way of example, FIG. 1 shows a bus access adapter 32, which allows additional components to be connected to the CPU bus 28. The CPU bus 28 is also connected to a PCI controller that serves as an interface between the CPU bus 28 and the PCI bus 42.
As indicated above, high bandwidth peripheral components are connected to the PCI bus 42. By way of example, FIG. 1 illustrates a video adapter 44, a Local Area Network (LAN) card 46, and a Small Computer System Interface (SCSI) adapter 48 connected to the PCI bus 42. When the PCI bus 42 was originally conceived, it was assumed that connections to hard disk drives would be made through the SCSI adapter 48. However, most computer manufacturers find it more economical to connect a hard disk drive through a hard drive controller 50, instead of through the SCSI adapter 48. The hard drive controller 50 may be implemented as an industry standard IDE/ATA controller.
The PCI local bus 42 also includes a bridge controller 52 that serves as an interface between the PCI bus and the ISA bus 60. Relatively low throughput peripheral devices are connected to the ISA bus 60. FIG. 1 illustrates a parallel port controller 62 connected to the ISA bus 60. The parallel port controller 62 is also connected to a parallel port connector 64 that is externally positioned on the outside of the housing (not shown) of the computer 20. The ISA bus 60 is also connected to a serial port controller 66 that is connected to an externally positioned serial port connector 68. FIG. 1 also illustrates that a floppy disk drive controller 70 may be connected to the ISA bus 60. The floppy controller 70 has a corresponding floppy connector 72 that is positioned within the housing of the computer 20. To indicate that a number of additional functional devices may be connected to the ISA bus 60, FIG. 1 illustrates an N-device controller 74 and a corresponding N-device connector 76. The N-device controller 74 may be a game controller, an additional serial port, etc.
The functional operations performed by the parallel port controller 62, the serial port controller 66, the floppy controller 70, and the N-device controller 74 may be integrated into a single input/output circuit 80, as indicated in FIG. 1. The single input/output circuit 80 may rely upon a buffer 82.
FIG. 2 illustrates a portion of a computer housing 90. The housing 90 includes a motherboard 92 that supports a set of ISA slots 94A, 94B, and 94C. Each slot receives a controller card so that the controller card can make a connection to the ISA bus 60 (not shown in FIG. 2). For example, the parallel port controller 62 of FIG. 1 may be in the form of a card that fits into slot 94A.
The housing 90 also includes a back plane 96. The back plane 96 has a set of apertures corresponding to the slots of the mother board 92. For example, slot 94A has a corresponding backplane aperture 98A, while slot 94B has a corresponding backplane aperture 98B. Relying upon the previous example, if the parallel port controller 62 was positioned in slot 94A, then the parallel port connector 64 would be positioned within backplane aperture 98A.
The mother board 92 also supports a set of PCI slots 102A, 102B, and 102C. To obtain access to the PCI bus 42, PCI devices such as the hard drive controller 50 or the LAN card 46 are connected to the PCI slots 102A, 102B, or 102C. PCI slots 102B and 102C have corresponding backplane apertures 104B and 104C.
Note that ISA slot 94C and PCI slot 102A share a common backplane aperture 100. In addition, the standard spacing between these slots (0.8 of an inch) precludes the use of a card in both the ISA slot 94C and the PCI slot 102A. For this reason, the ISA slot 94C and the PCI slot 102A are commonly called a "shared slot". A shared slot is used to provide a maximum number of computer slots on a motherboard. Unfortunately, only one slot of the "shared slot" can be used in the prior art because of the spacing between the slots 94C and 102A, and the fact that there is only one backplane aperture 100.
In addition to the peripheral devices shown in FIG. 1, personal computer users also desire to connect additional peripheral devices to the PCI bus 42, and ISA bus 60. Additional devices include, tape backup units, CD-ROM drives, scanners, video cameras, MIDI devices, and magneto-optical drives. Thus, it can be appreciated that it would be highly desirable to be able to exploit each bus slot provided in a computer, including both slots of a "shared slot".
Another shortcoming of the architecture associated with prior art personal computers, as shown in FIGS. 1 and 2, is that the PCI bus 42 is designated to carry one set of signals, while the ISA bus 60 is designated to carry another set of signals. Consequently, in the prior art, it is not possible to integrate the operations performed by a device connected to the ISA bus 60 with the operations performed by a device connected to the PCI bus 42. It would be highly desirable to provide a single device to perform operations associated with both an ISA bus 60 and a PCI bus 42. By combining these operations, slot space could be used for other peripheral devices. In addition, a single device that processes signals from two buses is less expensive than two devices to perform the same function.